Information
CMOS Op-Amp Design
You may either work either by yourself or with another student. Keep in mind that if you work with someone else, you will both get the same grade on the project. If you would prefer to design something else, you may, but you must discuss it with the instructor first.
This project entails the design and simulation of an operational amplifier using a 0.18-micron CMOS fabrication process. The supply rails are VDD=1.8V and ground. Transistor models are provided on the prior year's course homework web page. Assume the temperature coefficient of the resistors is -100ppm/◦C (This is the case with non-silicided resistors available in many CMOS processes). The resistor temperature coefficient can be specified in HSPICE using the following format:
RX node1 node2 value TC1=100e-6
You can use n-channel and p-channel MOSFETs and npn transistors. However, do not use pnp transistors in your design. Also, you must connect all n-channel bulk nodes to ground and all p-channel bulk nodes to VDD.
The following are the design and performance specifications for the CMOS op-amp design. These specifications should be met for temperature range from 20 to 100 ○C. An integral part of the final report will be to discuss tradeoffs between the various specifications.
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Design Parameter
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Conditions
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Specification
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Transistor gate length
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≥0.18mm
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Transistor gate width
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≥0.25mm and 60mm |
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Supply voltage
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1.8V single supply
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Capacitive loading
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at the output
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0.3pF between output and ground
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Maximum total on-chip resistance
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50kW
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Maximum total on-chip capacitance
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50pF
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Performance Parameter
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Conditions
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Specification
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Total DC Power dissipation (including both current reference and op-amp) |
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≤ 5mW
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Phase margin
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Unity gain configuration
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60 degrees (*most important spec*) |
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Overshoot in step response
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Unity gain configuration; 100mV input step |
< 1%
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Linear common-mode input swing
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Open-loop gain ≥ 50dB
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Within 0.4V of supply and ground
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Output swing
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Inverting closed-loop gain of 25
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Within 0.25V of supply and ground
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Open-loop gain
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> 60dB
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Systematic input-referred offset voltage |
≤ 0.1mV
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Gain-Bandwidth Product
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Unity gain configuration
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2 GHz
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Slew rate
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Unity gain configuration
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> 20 V/ms
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Noise corner frequency fcorner
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< 2.5MHz
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Input-referred spot voltage
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f > fcorner
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< 1nV/√Hz
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Grading Criteria
There will be a maximum of 50 points given for this project, determined by my reading the final report. The following items should be included in the report:
- Complete circuit schematics, description and explanation of your design. Your schematics should include all circuit details, including MOSFET W & L and other component values. Also include any appropriate references to journal articles or textbooks. (10 points)
- Discussion of tradeoffs that you encountered in trying to meet the specifications (e.g., power dissipation vs. bandwidth) and the choices that you made. (20 points)
- SPICE output verifying your circuit's performance for temperatures of 20, 60, and 100 degrees C. This should include the results from the dc operating point analysis .out file including the input netlist) as well as appropriate transient waveforms and Bode plots. (Be sure to use log-log plots for magnitude frequency response and linear-log plots for phase frequency response.) (15 points)
- Comparison between the given specifications and your circuit's performance. I don't expect your circuit to meet every specification listed above. (5 points)